Guaranteed memory reduction in synthesis of correct-by-design invariance controllers.

Elisei Macoveiciuc and Gunther Reissig.
Guaranteed memory reduction in synthesis of correct-by-design invariance controllers.
Proc. 21st IFAC World Congress, Berlin, Germany, 12-17 July 2020.

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Abstract:
Formal methods for analysis of dynamical systems through construction of finite symbolic abstractions have attracted significant interest as they allow solving complex control problems in a fully automated fashion. Nevertheless, their practical application is currently limited by the fact that they require enormous memory resources. We present a novel algorithm for solution of invariance problems within abstraction-based framework, which guarantees large storage reduction and fully applies to general non-linear plants. We also show that, in practice, the algorithm is faster compared to other methods.

BibTeX entry:

@InProceedings{MacoveiciucReissig19aC,
 author = {Elisei Macoveiciuc and Gunther Reissig},
 title  = {Guaranteed memory reduction in synthesis of correct-by-design invariance controllers},
 booktitle = {Proc. 21st IFAC World Congress, Berlin, Germany, } # jul # { 12-17, 2020},
 series = {IFAC-PapersOnLine},
 volume = 53,
 number = 2,
 PAGES = {5561-5566},
 YEAR = 2020,
 doi = {10.1016/j.ifacol.2020.12.1567}
}

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